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Supply, Delivery, Installation & Commissioning of a Wafer Thinning Turnkey ITT

University of Strathclyde

Buyer Contact Info

Buyer Name: University of Strathclyde

Buyer Address: Learning & Teaching Building, 49 Richmond Street, Glasgow, UKM82, G1 1XU, United Kingdom

Contact Name: Anna Sanina

Contact Email: anna.sanina@strath.ac.uk

Contact Telephone: +44 7811592949

Status
active
Procedure
open
Value
2000000.0 GBP
Published
20 May 2025, 12:42
Deadline
20 Jun 2025, 11:00
Contract Start
n/a
Contract End
n/a
Category
goods
CPV
31710000 - Electronic equipment
Region
n/a
Awarded To
n/a
Official Source
Open Find a Tender

Description

The University of Strathclyde has a requirement for a semiconductor wafer thinning capability suitable to receive wafers of various sizes and materials and grind, stress relieve and clean them before onward processing in a power semiconductor packaging line. The line will allow research to be performed on a variety of materials and processes involved in the manufacture of semiconductor products. This is in support of a publicly funded project that will see the creation of an advanced, scaleup packaging facility for power electronics within the National Manufacturing Institute Scotland (NMIS). The overall scale up manufacturing facility is to be housed at an NMIS site, this sub-section of the facility will be housed in an ISO-7 (class 10,000) clean room environment. The equipment within the facility will comprise the latest technology in their respective fields. It will be utilized in a range of projects within the Power Electronics industry and will be made available to both academic and industrial partners across the whole of the United Kingdom, including other catapult centres. As part of this project, NMIS has a requirement to procure a turnkey capability in wafer thinning, polishing, cleaning - which includes water management ancillary systems. High-efficiency grinder/polisher for wafers A Deionised Water Recycling Unit Automatic Cleaning System for wafers

Linked Documents

No linked documents found for this notice.

Opportunity Context

Lots

Lot Description: The University of Strathclyde has a requirement for a semiconductor wafer thinning capability suitable to receive wafers of various sizes and materials and grind, stress relieve and clean them before onward processing in a power semiconductor packaging line. The line will allow research to be performed on a variety of materials and processes involved in the manufacture of semiconductor products. This is in support of a publicly funded project that will see the creation of an advanced, scaleup packaging facility for power electronics within the National Manufacturing Institute Scotland (NMIS). The overall scale up manufacturing facility is to be housed at an NMIS site, this sub-section of the facility will be housed in an ISO-7 (class 10,000) clean room environment. The equipment within the facility will comprise the latest technology in their respective fields. It will be utilized in a range of projects within the Power Electronics industry and will be made available to both academic and industrial partners across the whole of the United Kingdom, including other catapult centres. As part of this project, NMIS has a requirement to procure a turnkey capability in wafer thinning, polishing, cleaning - which includes water management ancillary systems.

Lot 1 Status: active

Lot 1 Has Options: Yes

Lot 1 Options: The Contracting Authority reserves the right to request additional deliveries by the successful Tenderer, either intended as partial replacement of supplies or installations or as extensions of existing supplies and installations. The Contracting Authority may at it's sole discretion exercise this option.

Lot 1 Award Criterion (quality): Quality

Raw Notice JSON

Expand raw payload
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    "description": "The University of Strathclyde has a requirement for a semiconductor wafer thinning capability suitable to receive wafers of various sizes and materials and grind, stress relieve and clean them before onward processing in a power semiconductor packaging line.\nThe line will allow research to be performed on a variety of materials and processes involved in the manufacture of semiconductor products.  This is in support of a publicly funded project that will see the creation of an advanced, scaleup packaging facility for power electronics within the National Manufacturing Institute Scotland (NMIS).  The overall scale up manufacturing facility is to be housed at an NMIS site, this sub-section of the facility will be housed in an ISO-7 (class 10,000) clean room environment. The equipment within the facility will comprise the latest technology in their respective fields. It will be utilized in a range of projects within the Power Electronics industry and will be made available to both academic and industrial partners across the whole of the United Kingdom, including other catapult centres.  As part of this project, NMIS has a requirement to procure a turnkey capability in wafer thinning, polishing, cleaning - which includes water management ancillary systems.\nHigh-efficiency grinder/polisher for wafers\nA Deionised Water Recycling Unit\nAutomatic Cleaning System for wafers",
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